1. Field of the Invention
This invention relates to silicon on insulator technology and, more specifically, to formation of vertical silicon bipolar transistor structures in a completely isolated silicon region on a silicon substrate.
2. Brief Description of the Prior Art
Thre have been many approaches described in the prior art pertaining to the formation of completely isolated semiconductor devices. Such approaches have included (1) the implantation of oxygen and (2) the conversion of silicon to a porous layer by electrochemical anodization with subsequent oxidation of the porous silicon layer to form an oxide underlayer, as well as other approaches, the former approach being the most popular. Examples of the above noted second approach are set forth in Pat. No. 4,628,591, Ser. No. 810,001, filed Dec. 17, 1985 of R. S. Keen and Ser. No. 806,258, filed Dec. 6, 1985 of E. Zorinsky, all of which are incorporated herein by reference. The technique utilized in these references employs two successively grown epitaxial layers. The first epitaxial layer, which is heavily doped, serves as the anodizable layer which is then oxidized and the second epitaxial layer, which is less heavily doped, provides the isolated silicon in which MOS or bipolar transistors are built.
Typically, the starting material in the prior art has been P-type, though N-type has also been suggested. Generally, in the prior art N-type technology, an N-type &lt;100&gt; silicon substrate is provided which has been doped to about 2 to 3 ohm-cm. and on which is formed a heavily doped N+ first epitaxial layer with a lesser doped second epitaxial layer formed thereover. A layer of silicon nitride is then formed on the second epitaxial layer to operate as an anodization mask and a silicon oxide layer is then deposited over the nitride and serves as a mask for the later trench etch.
In the present invention, a trench etch is then performed down to the substrate to expose the heavily doped N+ layer. The slice is then placed in the anodization system of the type shown in the above noted U.S. Pat. No. 4,628,591 where the heavily doped N+ layer is selectively porously anodized. Neither the moderately doped N+layer nor the lightly doped N-type layer are affected. The heavily doped porously anodized layer is oxidized to the exclusion of the other two layers because the porous layer has a much greater differential oxidation rate than does the bulk silicon due to the substantially larger surface area available therein for such oxidation. Accordingly, the single crystal silicon in the porous layer is oxidized with a sidewall oxide then being formed on all exposed walls in the trench. Oxide is also formed on the substrate. The mask is then removed, the trench is filled with silicon oxide and the device surface is planarized. The result is the in situ formation of an isolated silicon structure having a buried collector already in place.
Previous approaches to dielectric isolation via oxidized porous silicon have been unable to provide the control necessary to isolate thick tubs, e.g., those in excess of 0.5 microns or layered structures, such as those which are necessary for certain bipolar applications.
It is desired to form bipolar semiconductor devices of the above described type and particularly in an N-type substrate.